DEVICE STRUCTURE SUITABLE FOR PARALLEL TEST
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United States of America Patent
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Issued Date -
Nov 27, 2014
app pub date -
Nov 19, 2013
filing date -
May 23, 2013
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
A device structure suitable for parallel test is disclosed, which includes a main body and an anti-crosstalk structure. The main body includes a first well formed in a substrate, the first well defining a boundary of the main body in the substrate. The anti-crosstalk structure is a second well formed in the substrate and surrounding the first well of the main body. The second well has a conductivity type opposite to a conductivity type of the first well and has a depth greater than a depth of the first well. The present invention is capable of preventing the interference between leakage currents generated in bases of the same conductivity type of different such device structures during a parallel test, thereby allowing the leakage currents to be correctly measured and improving the reliability of measurement result and the test efficiency.
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