Memory device, host device, and sampling clock adjusting method
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United States of America Patent
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Mar 22, 2016
Grant Date -
Nov 27, 2014
app pub date -
Aug 12, 2014
filing date -
Dec 26, 2008
priority date (Note) -
In Force
status (Latency Note)
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Abstract
A memory card includes a memory controller configured to perform control for sending and receiving a command signal, a response signal, a data signal, and a status signal in synchronization with a clock signal, and a memory-side pattern signal storage unit configured to store a tuning pattern signal to be sent to a host device. The tuning pattern signal is used by the host device to adjust the phase of the clock signal for use as a sampling clock signal. The memory card sends a first tuning pattern signal through a command line and a second tuning pattern signal through a data line concurrently.
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