POWER SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF

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United States of America Patent

SERIAL NO

14308000

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Abstract

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Disclosed are a power semiconductor device and a method of fabricating the same which can increase a breakdown voltage of the device through a field plate formed between a gate electrode and a drain electrode and achieve an easier manufacturing process at the same time. The power semiconductor device according to an exemplary embodiment of the present disclosure includes a source electrode and a drain electrode formed on a substrate; a dielectric layer formed between the source electrode and the drain electrode to have a lower height than heights of the two electrodes and including an etched part exposing the substrate; a gate electrode formed on the etched part; a field plate formed on the dielectric layer between the gate electrode and the drain electrode; and a metal configured to connect the field plate and the source electrode.

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Patent Owner(s)

Patent OwnerAddress
ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEDAEJEON 34129

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
AHN, Ho Kyun Daejeon, KR 45 160
BAE, Sung Bum Daejeon, KR 13 43
CHANG, Woo Jin Daejeon, KR 78 271
JU, Chull Won Daejeon, KR 26 242
KO, Sang Choon Daejeon, KR 39 293
LIM, Jong-Won Daejeon, KR 39 138
MUN, Jae Kyoung Daejeon, KR 55 281
NAM, Eun Soo Daejeon, KR 89 500
PARK, Young Rak Daejeon, KR 21 136

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