Delta-sigma modulator with high input impedance
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United States of America Patent
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Aug 25, 2015
Grant Date -
Dec 18, 2014
app pub date -
Aug 27, 2014
filing date -
Jun 17, 2013
priority date (Note) -
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Abstract
Measurement circuits having a delta-sigma modulator are disclosed. One example measurement circuit includes a low pass filter coupled to receive an input voltage, a switched-capacitor integrator circuit, and a switched comparator circuit. The measurement circuit may generate a digital output made up of a sequence of logic high and logic low levels that are representative of a scaled value of the input voltage output by the low pass filter circuit. Also, by virtue of its switched-capacitor configuration, the electric charge received by the switched difference amplifier circuit may be returned to the input in a manner such that the input to the delta-sigma modulator takes little to no average current from the voltage it measures. In other words, the delta-sigma modulator may have a high input impedance by virtue of its switched-capacitor circuit configuration.
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