High linearity SOI wafer for low-distortion circuit applications

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United States of America Patent

PATENT NO 8951896
APP PUB NO 20150004778A1
SERIAL NO

13929955

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Abstract

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According to a method herein, a first side of a substrate is implanted with a first material to change a crystalline structure of the first side of the substrate from a first crystalline state to a second crystalline state, after the first material is implanted. A second material is deposited on the first side of the substrate, after the first material is implanted. A first side of an insulator layer is bonded to the second material on the first side of the substrate. Integrated circuit devices are formed on a second side of the insulator layer, opposite the first side of the insulator layer, after the insulator layer is bonded to the second material. The integrated circuit devices are thermally annealed. The first material maintains the second crystalline state of the first side of the substrate during the annealing.

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Patent Owner(s)

  • GLOBALFOUNDRIES INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Botula, Alan B Essex Junction, US 52 637
Hanrahan, Jeffrey E Burlington, US 2 71
Jaffe, Mark D Shelburne, US 146 2258
Joseph, Alvin J Williston, US 129 1206
Martin, Dale W Hyde Park, US 23 603
Pfeiffer, Gerd Poughquag, US 36 421
Slinkman, James A Montpelier, US 71 888

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