Non-volatile memory with silicided bit line contacts
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United States of America Patent
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Feb 2, 2016
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app pub date -
Sep 30, 2014
filing date -
Jan 30, 2013
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Abstract
An approach to use silicided bit line contacts that do not short to the underlying substrate in memory devices. The approach provides for silicide formation in the bit line contact area, using a process that benefits from being self-aligned to the oxide-nitride-oxide (ONO) nitride edges. A further benefit of the approach is that the bit line contact implant and rapid temperature anneal process can be eliminated. This approach is applicable to embedded flash, integrating high density devices and advanced logic processes.
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