System level architecture verification for transaction execution in a multi-processing environment

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United States of America Patent

PATENT NO 9170903
APP PUB NO 20150019846A1
SERIAL NO

14501845

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Abstract

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Embodiments relate to building, by a computing device, a pseudo-random dynamic instruction stream that comprises instructions configured to perform a transaction execution. The computing device may cause the transaction execution to be tested in a multi-processing system based on the instruction stream. A status of the test may be output to one or more output devices.

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Patent Owner(s)

  • INTERNATIONAL BUSINESS MACHINES CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Duale, Ali Y Poughkeepsie, US 83 390
Wittig, Dennis W New Paltz, US 16 168

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