Through Semiconductor via Structure with Reduced Stress Proximity Effect
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United States of America Patent
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Jan 22, 2015
app pub date -
Jun 23, 2014
filing date -
Jul 22, 2013
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Abstract
An integrated circuit device and associated fabrication process are disclosed for forming a through semiconductor via (TSV) conductor structure in a semiconductor substrate with active circuitry formed on a first substrate surface where the TSV conductor structure includes multiple small diameter conductive vias extending through the first substrate surface and into the semiconductor substrate by a predetermined depth and a large diameter conductive via formed to extend from the multiple small diameter conductive vias and through a second substrate surface opposite to the first substrate surface.
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