Nonvolatile semiconductor memory device
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United States of America Patent
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Dec 1, 2015
Grant Date -
Jan 29, 2015
app pub date -
Dec 4, 2013
filing date -
Jul 24, 2013
priority date (Note) -
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Abstract
A nonvolatile semiconductor memory device including: a memory cell array including NAND strings; a plurality of word lines; a plurality of bit lines; a source line; and a control circuit configured to execute a write operation. The control circuit is configured to, when charging an unselected memory string prior to the write operation, execute both first and second charging operations, the first charging operation applying to the bit line connected to the unselected memory string a first voltage and rendering conductive a first select transistor to charge the unselected memory string, and the second charging operation applying to the source line connected to the unselected memory string a second voltage and rendering conductive a second select transistor to charge the unselected memory string, the first and second charging operations being executed at different timings.
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