Flat laminate, symmetrical test structures and method of use to gauge white bump sensitivity

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United States of America Patent

PATENT NO 9899279
SERIAL NO

14517053

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Abstract

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A symmetrical, flat laminate structure used to minimize variables in a test structure to experimentally gauge white bump sensitivity to CTE mismatch is disclosed. The test structure includes a flat laminate structure. The method of using the test structure includes isolating a cause of a multivariable chip join problem that is adversely impacted by warpage and quantifying a contribution of the warpage, itself, in a formation of the multivariable chip join problem.

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Patent Owner(s)

  • INTERNATIONAL BUSINESS MACHINES CORPORATION

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Bernier, William E Endwell, US 34 269
Daubenspeck, Timothy H Colchester, US 147 1753
Jadhav, Virendra R Wappingers Falls, US 25 237
Oberson, Valerie A Quebec, CA 5 36
Questad, David L Hopewell Junction, US 60 469

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