STACKED VIA STRUCTURES AND METHODS OF FABRICATION
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United States of America Patent
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Issued Date -
Feb 19, 2015
app pub date -
Aug 14, 2013
filing date -
Aug 14, 2013
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
This disclosure provides systems, methods and apparatus for a stacked via having a top via structure and a bottom via structure. In one aspect, the bottom via structure includes a bottom dielectric layer and a bottom via extending through the bottom dielectric layer. The bottom via includes a bottom metal formed on the bottom dielectric layer, where the bottom via is substantially filled by a dielectric material. The top via structure includes a top dielectric layer over the bottom metal and a top via extending to a top plane of the bottom via in the top dielectric layer. The top via includes a top metal formed on the top dielectric layer, where the top metal is in electrical contact with the bottom metal at a peripheral area of the bottom via structure.
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