Nonvolatile semiconductor memory device having stacked memory cell layers and a control circuit controlling write or read based on parameters according to a selected memory cell layer
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United States of America Patent
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Sep 29, 2015
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app pub date -
Oct 23, 2013
filing date -
Aug 19, 2013
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Abstract
According to an embodiment, a nonvolatile semiconductor memory device comprises a memory cell array and a control circuit. The memory cell array includes a plurality of memory cell layers that are stacked. Each memory cell layer comprises a plurality of memory cells formed on a semiconductor layer. The plurality of memory cell layers include: a first memory cell layer where the semiconductor layer is configured of monocrystalline silicon; and a second memory cell layer where the semiconductor layer is configured of polycrystalline silicon. The control circuit, when controlling write or read of data to/from a memory cell belonging to the first memory cell layer, performs control based on a first parameter, and when controlling write or read of data to/from a memory cell belonging to the second memory cell layer, performs control based on a second parameter that differs from the first parameter.
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