Semiconductor Die Having Fine Pitch Electrical Interconnects

Number of patents in Portfolio can not be more than 2000

United States of America Patent

APP PUB NO 20150056753A1
SERIAL NO

14480373

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A die has interconnect pads on an interconnect side near an interconnect edge and has at least a portion of the interconnect side covered by a conformal dielectric coating, in which an interconnect trace over the dielectric coating forms a high interface angle with the surface of the dielectric coating. Because the traces have a high interface angle, a tendency for the interconnect materials to “bleed” laterally is mitigated and contact or overlap of adjacent traces is avoided. The interconnect trace includes a curable electrically conductive interconnect material; that is, it includes a material that can be applied in a flowable form, and thereafter cured or allowed to cure to form the conductive traces. Also, a method includes, prior to forming the traces, subjecting the surface of the conformal dielectric coating with a CF4 plasma treatment.

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Patent Owner(s)

Patent OwnerAddress
INVENSAS CORPORATION3025 ORCHARD PARKWAY SAN JOSE CA 95134

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Barrie, Keith Lake Capitola, US 2 2
Leal, Jeffrey S Scotts Valley, US 13 329
Pangrle, Suzette K Cupertino, US 71 1268
Villavicencio, Grant Scotts Valley, US 12 195

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