CONTROLLER, MEMORY SYSTEM, AND METHOD

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United States of America Patent

SERIAL NO

14208282

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Abstract

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According to the embodiments, a controller includes an arbiter, a command fetch unit, and a processing unit. The arbiter executes a retrieval process. The retrieval process is a process of selecting a queue, to which a command is issued, out of plural queues by retrieval according to a round robin method. The command fetch unit fetches a command from the selected queue. The processing unit executes a process according to the fetched command to a memory chip. The arbiter manages a retrieval position. When a new command is issued to any one of the plural queues in an empty state in which there is no queue to which a command is issued, the arbiter has the retrieval position jump to the queue to which the new command is issued.

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Patent Owner(s)

Patent OwnerAddress
KABUSHIKI KAISHA TOSHIBA1-1 SHIBAURA 1-CHOME MINATO-KU TOKYO 105-0023

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
MATSUMOTO, Takaaki Minato-ku, JP 27 134
MIYAMOTO, Yukimasa Yokohama-shi, JP 16 200
OIKAWA, Kohei Kawasaki-shi, JP 57 200

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