Semiconductor memory device and method for manufacturing same
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United States of America Patent
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May 12, 2015
Grant Date -
Mar 12, 2015
app pub date -
Mar 11, 2014
filing date -
Sep 10, 2013
priority date (Note) -
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Abstract
According to one embodiment, the stacked body includes a plurality of electrode layers and a plurality of insulating layers alternately stacked on the substrate. The plurality of contact parts are provided in a protruding shape on respective end parts of the plurality of electrode layers. The plurality of contact parts do not overlap each other in the stacking direction. The plurality of contact parts are displaced in a surface direction of the substrate. The plurality of plugs extends from the respective contact parts toward the respective circuit interconnections and electrically connects the respective contact parts with the respective circuit interconnections.
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