Semiconductor storage device
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United States of America Patent
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Feb 2, 2016
Grant Date -
Mar 12, 2015
app pub date -
Mar 10, 2014
filing date -
Sep 9, 2013
priority date (Note) -
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Abstract
The semiconductor storage device of the embodiment includes memory cells. Word lines are connected to the memory cells. Bit lines are connected to the memory cells. A sense amplifier unit is connected to the bit lines. A data write operation includes a first write loop and a second write loop. The first write loop includes a first program operation and a first verify operation. The second write loop includes a second program operation and a second verify operation. A maximum value of a consumed current in the first verify operation is substantially equal to a maximum value of the consumed current in the second verify operation. The consumed current in the first verify operation is substantially same as the consumed current in the second verify operation if data input in the data write operation is all equal to first data corresponding to an erasure state.
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