Method of fabricating metal-insulator-semiconductor tunneling contacts using conformal deposition and thermal growth processes
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United States of America Patent
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Sep 6, 2016
Grant Date -
Mar 19, 2015
app pub date -
Nov 25, 2014
filing date -
Dec 19, 2008
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Abstract
A microelectronic device may be formed with at least one transistor having a source region and a drain region, wherein an interlayer dielectric layer may be formed adjacent the transistor. A trench may be formed through the first interlayer dielectric layer to at least one of the source region and the drain region and a conductive contact may be formed in the trench, wherein the conductive contact comprises a conformal conductive layer separated from the at least one of the source region and the drain region by a conformal insulating layer.
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