Plug via formation by patterned plating and polishing
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United States of America Patent
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Oct 13, 2015
Grant Date -
Mar 19, 2015
app pub date -
Sep 13, 2013
filing date -
Sep 13, 2013
priority date (Note) -
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status (Latency Note)
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Abstract
Solder bump connections and methods for fabricating solder bump connections. A passivation layer is formed on a dielectric layer. A via opening extends through the passivation layer from a top surface of the passivation layer to a metal line in the dielectric layer. A mask on the top surface of the passivation layer includes a mask opening that is aligned with the via opening. A conductive layer is selectively formed in the via opening and the mask opening. The conductive layer projects above the top surface of the passivation layer. The method further includes planarizing the passivation layer and the conductive layer to define a plug in the via opening that is coupled with the metal line.
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