Fast recalibration circuitry for input/output (IO) compensation finite state machine power-down-exit
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United States of America Patent
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Mar 22, 2016
Grant Date -
Mar 19, 2015
app pub date -
Sep 16, 2013
filing date -
Sep 16, 2013
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Abstract
Fast recalibration circuitry for input/output (IO) compensation finite state machine power-down exit is described. The fast recalibration circuitry includes a finite state machine having a volatile memory to store an IO compensation setting and a power supply coupled to the volatile memory to provide power to the volatile memory. The fast recalibration circuitry includes a persistent memory coupled to the volatile memory and one or more circuits, coupled to the volatile memory and the persistent memory, to identify an event to enter a power-down mode, wherein the power-down mode comprises the power supply removing power from the volatile memory and transfer the IO compensation setting in the volatile memory to the persistent memory prior to the power supply removing the power from the volatile memory.
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