Bit-Line Discharge Assistance in Memory Devices
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United States of America Patent
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Issued Date -
Mar 26, 2015
app pub date -
Nov 4, 2013
filing date -
Sep 20, 2013
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
One embodiment is an apparatus that has a memory array, a discharge device, and a discharge assistance controller. The memory array has memory cells arranged in at least one column that is coupled to a read bit line, and the discharge device is configured to provide discharge assistance to the read bit line. The discharge assistance controller is configured to modify duration of the discharge assistance in correlation with capacitance of the read bit line.
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