METHOD FOR MANAGING A MEMORY APPARATUS

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United States of America Patent

SERIAL NO

14566724

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Abstract

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A memory apparatus includes at least one NV memory element, which includes a plurality of blocks. A method for managing the memory apparatus includes: receiving a first access command from a host; analyzing the first access command to obtain a first host address; linking the first host address to a first page of the physical block; receiving a second access command from the host; analyzing the second access command to obtain a second host address; linking the second host address to a second page of the physical block; recording a valid/invalid page count of the physical block corresponding to accessing pages of the physical block; and determining whether to erase a portion of the blocks according to the valid/invalid page count. A difference value of the first host address and the second host address is greater than a number of pages of the physical block.

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Patent Owner(s)

Patent OwnerAddress
SILICON MOTION INC8F-1 NO 36 TAIYUAN ST JHUBEI CITY HSINCHU COUNTY 302

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Lee, Chun-Kun Hsinchu County, TW 27 119
Lin, Tsai-Cheng Hsinchu City, TW 22 100

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