APPARATUS AND METHOD FOR EFFICIENT MIGRATION OF ARCHITECTURAL STATE BETWEEN PROCESSOR CORES

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United States of America Patent

APP PUB NO 20150095614A1
SERIAL NO

14040230

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Abstract

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An apparatus and method are described for the efficient migration of architectural state between processor cores. For example, a processor according to one embodiment comprises: a first processing core having a first instruction execution pipeline including first register set for storing a first architectural state of a first thread being executed thereon; a second processing core having a second instruction execution pipeline including a second register set for storing a second architectural state of a second thread being executed thereon; and architectural state migration logic to perform a direct, simultaneous swap of the first architectural state from the first register set with the second architectural state from the second register set responsive to detecting that the execution of the first thread is to be migrated from the first core to the second core.

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Patent Owner(s)

Patent OwnerAddress
INTEL CORPORATION2200 MISSION COLLEGE BOULEVARD SANTA CLARA CA 95052

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Brandt, Jason W Austin, US 156 1306
Hahn, Scott D Portland, US 19 567
Toll, Bret L Hillsboro, US 161 1328
Toll, Thomas F Portland, US 3 13

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