System and method of using an atomic data buffer to bypass a memory location

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United States of America Patent

PATENT NO 9471323
SERIAL NO

14045515

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Abstract

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Methods and systems may provide for receiving a request to perform an atomic operation and adding the atomic operation to an execution pipeline of an arithmetic logic unit (ALU) for one or more pending atomic operations if the one or more pending atomic operations are associated with a memory location identified in the request. Additionally, at least a portion of the execution pipeline may bypass the memory location. In one example, adding the atomic operation to the execution pipeline includes populating a linked list with a modification associated with the atomic operation, wherein the linked list is dedicated to the memory location.

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Patent Owner(s)

Patent OwnerAddress
INTEL CORPORATION2200 MISSION COLLEGE BLVD SANTA CLARA CA 95054

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
K, Pattabhiraman Bangalore, IN 49 192
Koker, Altug El Dorado Hills, US 518 2113
S, Jayakrishna P Bangalore, IN 5 19

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