Memory program upon system failure
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United States of America Patent
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Aug 30, 2016
Grant Date -
Apr 16, 2015
app pub date -
Oct 16, 2013
filing date -
Oct 16, 2013
priority date (Note) -
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status (Latency Note)
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Abstract
A system and method for programming a memory device with debug data upon a system failure is disclosed herein. For example, the system can include a timer device, a buffer, a register, and a memory device. The buffer can be configured to receive debug data. The register can be configured to receive memory address information. Also, the memory device can be configured to store the debug data from the buffer at a memory address corresponding to the memory address information when a timer value of the timer device reaches zero. Further, the system can include a processing unit configured to provide the timer value to the timer device and the memory address information to the register.
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