System for designing network on chip interconnect arrangements
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United States of America Patent
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Dec 1, 2015
Grant Date -
Apr 16, 2015
app pub date -
Oct 9, 2014
filing date -
Oct 11, 2013
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Abstract
A system for designing Network-on-Chip interconnect arrangements includes a Network-on-Chip backbone with a plurality of backbone ports and a set of functional clusters of aggregated IPs providing respective sets of System-on-Chip functions. The functional clusters include respective sub-networks attachable to any of the backbone ports and to any other functional cluster in the set of functional clusters independently of the source map of the Network-on-Chip backbone.
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