Nonvolatile semiconductor memory apparatus
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Nov 22, 2016
Grant Date -
Apr 30, 2015
app pub date -
Dec 23, 2014
filing date -
Oct 9, 2012
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
According to one embodiment, a nonvolatile semiconductor memory apparatus includes a memory cell array, a row decoder, a controller. The memory cell array includes a plurality of memory strings. The memory strings include a first select transistor and a second select transistor, and are connected to each of a plurality of bit lines. The row decoder applies a voltage to the first and second select transistors. The controller detects a defect of the bit lines based on data read from the memory cells.
First Claim
Family
International Classification(s)
- [Classification Symbol]
- [Patents Count]
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully