Method for implementing inter-virtual processor interrupt by writing register data in a single write operation to a virtual register
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United States of America Patent
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Jul 4, 2017
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app pub date -
Nov 24, 2014
filing date -
Oct 31, 2013
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Abstract
A method for implementing an inter-virtual processor interrupt is provided, which includes: when a source virtual processor needs to trigger an interrupt to a target virtual processor, writing register data that includes information about the target virtual processor and indication data used to indicate that the source virtual processor triggers the interrupt to the target virtual processor into a virtual register of a virtual advanced programmable interrupt controller (vAPIC) of the source virtual processor, so that a virtual machine monitor obtains the information about the target virtual processor and the indication data from the virtual register by means of parsing, and the virtual machine monitor injects an inter-virtual processor interrupt into the target virtual processor according to the information about the target virtual processor and the indication data. Accordingly, the embodiments of the present invention further provide a related virtual machine, a virtual controller, a computing node, and a system.
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