Physical address management in solid state memory
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United States of America Patent
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Jul 26, 2016
Issued Date -
N/A
app pub date -
Nov 6, 2013
filing date -
Nov 6, 2013
priority date (Note) -
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Abstract
A storage system includes a memory controller connected to a solid state memory device and a read status table that tracks a pending read from the solid state memory device and a physical address of the solid state memory device that is associated with the pending read. The memory controller releases the physical address for reassignment when the read status table indicates that no pending reads are associated with the physical address. In certain embodiments, the read status table may be included within the memory controller. In certain embodiments, subsequent to the release of the physical address, erase operations may erase data at the physical address and the physical address may be reassigned to a new logical address by ensuing host write operations.
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