PARALLEL BIT INTERLEAVER
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United States of America Patent
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Issued Date -
May 7, 2015
app pub date -
May 18, 2012
filing date -
May 18, 2011
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
A bit interleaving method involves applying a bit permutation process to a QC-LDPC codeword made up of N cyclic blocks each including Q bits, and dividing the codeword after the permutation process into a plurality of constellation words each including M bits, the codeword being divided into F×N/M folding sections, each of the constellation words being associated with one of the F×N/M folding sections, and the bit permutation process being applied such that each of the constellation words includes F bits from each of M/F different cyclic blocks in a given folding section associated with a given constellation word.
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