Semiconductor devices including vertical memory cells and methods of forming same
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United States of America Patent
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Jun 21, 2016
Grant Date -
May 14, 2015
app pub date -
Nov 8, 2013
filing date -
Mar 1, 2013
priority date (Note) -
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Abstract
A semiconductor device may include a memory array including vertical memory cells connected to a digit line, word lines, and a body connection line. A row or column of the memory array may include one or more pillars connected to the body connection line. A voltage may be applied to the body connection line through at least one pillar connected to the body connection line. Application of the voltage to the body connection line may reduce floating body effects. Methods of forming a connection between at least one pillar and a voltage supply are disclosed. Semiconductor devices including such connections are also disclosed.
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