PROCESS FOR MANUFACTURING DEVICES FOR POWER APPLICATIONS IN INTEGRATED CIRCUITS
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United States of America Patent
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app pub date -
Jan 27, 2015
filing date -
Apr 22, 2009
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Abandoned
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Abstract
A MOS transistor for power applications is formed in a substrate of semiconductor material by a method integrated in a process for manufacturing integrated circuits which uses an STI technique for forming insulating regions. The method includes the phases of forming an insulating element on a top surface of the substrate and forming a control electrode on a free surface of the insulating element. The insulating element insulates the control electrode from the substrate. The insulating element includes a first portion and a second portion. The extension of the first portion along a first direction perpendicular to the top surface is lower than the extension of the second portion along such first direction. The phase of forming the insulating element includes generating the second portion by locally oxidizing the top surface.
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