Glitch-aware phase algebra for clock analysis
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United States of America Patent
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Nov 28, 2017
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app pub date -
Nov 19, 2014
filing date -
Dec 5, 2013
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Abstract
A design tool can implement phase algebra based design evaluation to evaluate a circuit design with a compact representation of numerous waveforms without simulating the individual waveforms. The design tool can determine an input sequence of signal transition representations associated with an input net of a component in a register transfer level circuit design, where each signal transition representation represents a nondeterministic transition from a previous signal state to one or more possible signal states. Determining the input sequence of signal transition representations includes determining that a subsequence of the input sequence of signal transition representations indicates at most one transition within the subsequence of the input sequence. The design tool can determine, based on the indicated component and on the determination that the subsequence indicates at most one transition, an output sequence of signal transition representations derived from the input sequence of signal transition representations.
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