Pattern factor dependency alleviation for eDRAM and logic devices with disposable fill to ease deep trench integration with fins
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
May 17, 2016
Grant Date -
Jun 11, 2015
app pub date -
Dec 6, 2013
filing date -
Dec 6, 2013
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
Dummy deep trenches can be formed within a logic device region in which logic devices are to be formed while deep trench capacitors are formed within a memory device region. Semiconductor fins are formed over a top surface prior to forming trenches, and disposable material is filled around said semiconductor fins. A top surface of said disposable filler material layer can be coplanar with a top surface of said semiconductor fins, which eases deep trench formation. Conductive material portions of the dummy deep trenches can be recessed to avoid electrical contact with semiconductor fins within the logic device region, while an inner electrode of each deep trench can contact a semiconductor fin within the memory device region. A dielectric material portion can be formed above each conductive material portion of a dummy deep trench.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully