Phase algebra for analysis of hierarchical designs
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United States of America Patent
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Mar 13, 2018
Grant Date -
Jun 18, 2015
app pub date -
Feb 25, 2015
filing date -
Dec 5, 2013
priority date (Note) -
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Abstract
A design tool can implement phase algebra based design evaluation to evaluate a circuit design with a compact representation of waveforms without simulating the individual waveforms. The tool can determine whether module instances of a register level circuit design share a common usage, each instance being associated with a mapping. Two instances share a common usage if a sequence of signal transition representations received by the first instance can be mapped using a first mapping to the same common sequence of signal transition representations as a mapping of another sequence of signal transition representations received by the second instance using a second mapping. A result sequence of signal transition representations was generated by a previous propagation of the common sequence through the common usage. If the two instances share the common usage, the result sequence is mapped to an output sequence for the second instance using the second mapping.
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