Power supply noise reduction circuit and power supply noise reduction method
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United States of America Patent
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Mar 20, 2018
Issued Date -
N/A
app pub date -
Dec 18, 2014
filing date -
Dec 23, 2013
priority date (Note) -
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Abstract
A power supply noise reduction circuit and a power supply noise reduction method are provided. An integrated circuit includes an input node configured to receive a signal via a transmission line. The integrated circuit also includes termination circuitry configured to electrically couple the input node to a power rail of the integrated circuit. The integrated circuit further includes a circuit component coupled to the power rail. The circuit component is configured to bleed off a portion of current on the power rail based on a determination that a voltage on the power rail meets or exceeds a high voltage threshold. The circuit component is also configured to bleed off a smaller portion of the current on the power rail based on a determination that the voltage on the power rail is less than the high voltage threshold.
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