PREVENTING INTERFERENCE BETWEEN SUBSYSTEM BLOCKS AT A DESIGN TIME

Number of patents in Portfolio can not be more than 2000

United States of America Patent

SERIAL NO

14599503

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

A method of preventing interference between subsystem blocks includes obtaining an integrity level for a first subsystem block, obtaining an integrity level for a second subsystem block, assigning an integrity level property to at least one input port of the first block, the integrity level property assigned to the input port of the first block being based on the integrity level defined for the first block, and assigning an integrity level property to at least one output port of the second block, the integrity level property assigned to the output port of the second block being based on the integrity level defined for the second block. The method further includes evaluating the integrity level property of at least one input/output pair to determine whether an inappropriate connection exists, and performing a first action when an inappropriate connection exists, or performing a second action when an appropriate connection exists.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
THE MATHWORKS INC3 APPLE HILL DRIVE NATICK MA 01760

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
WU, PENGCHENG MARLBOROUGH, US 8 72

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation