OPTIMIZED WRITE ALLOCATION FOR TWO-LEVEL MEMORY

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United States of America Patent

APP PUB NO 20150178203A1
SERIAL NO

14140256

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Abstract

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Systems and methods for write allocation by a two-level memory controller. An example processing system comprises: a processing core; a memory controller communicatively coupled to the processing core; and a system memory communicatively coupled to the memory controller, the system memory comprising a first level memory and a second level memory; wherein the memory controller is configured, responsive to determining that a memory block referenced by a memory write request is not present in the first level memory, to allocate a new first level memory block without retrieving the memory block referenced by the request from the second level memory, wherein the memory write request is represented by an overwrite type memory write request.

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Patent Owner(s)

Patent OwnerAddress
INTEL CORPORATION2200 MISSION COLLEGE BOULEVARD SANTA CLARA CA 95054

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Fanning, Blaise Folsom, US 83 1479
Parra, Jorge E El Dorado Hills, US 21 64
Ray, Joydeep Folsom, US 558 2131
Torrant, Marc Sacramento, US 8 59

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