Digital current equalization method and power supply module
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United States of America Patent
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Apr 11, 2017
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N/A
app pub date -
Dec 30, 2014
filing date -
Dec 19, 2013
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Abstract
A digital current equalization method includes: acquiring a current value from a counter preset value loading module in each synchronization period; generating a continuous variable frequency pulse according to the current value, and receiving a synchronization signal transmitted by a phase inverter connected to the PFM generator; transmitting, according to the synchronization signal, the continuous variable frequency pulse to the digital current equalization bus through an OC gate of a triode connected to the PFM generator; counting a frequency of the continuous variable frequency pulse on the digital current equalization bus, where an acquired frequency count value is used to represent a current magnitude of a power supply module, which currently outputs a greatest current, of the foregoing power supply module and a power supply module connected in parallel with the foregoing power supply module to accordingly adjust the output current of the foregoing power supply module.
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