Gate driving circuit and display device
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United States of America Patent
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Jan 9, 2018
Issued Date -
N/A
app pub date -
Dec 19, 2014
filing date -
Dec 31, 2013
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Abstract
The present disclosure discloses a gate driving circuit and a display device, to avoid power consumption arising from overlapping of voltages output by the output ends of gate drivers in the case that the gate driving circuit is configured with a plurality of clock signals. The gate driving circuit includes: a plurality of gate scan lines, and N stages of gate drivers connected in cascade. Each stage of gate drivers includes a reset end and an output end, which provides a gate scan signal to a corresponding gate scan lines. The output end of a m-th stage gate driver is connected provides a reset signal to the reset end of a (m−1)-th stage of gate drivers, N and m are positive integers, and m
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# of filed Patents
Total Citations
Ren, Hu nan
Shanghai, CN
1
23
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