Independent gate vertical FinFET structure
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United States of America Patent
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Nov 17, 2015
Grant Date -
Jul 2, 2015
app pub date -
Dec 27, 2013
filing date -
Dec 27, 2013
priority date (Note) -
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Abstract
A semiconductor device includes a substrate extending in a first direction to define a substrate length and a second direction perpendicular to the first direction to define a substrate width. A first semiconductor fin is formed on an upper surface of the substrate. The first semiconductor fin extends along the second direction at a first distance to define a first fin width. A first gate channel is formed between a first source/drain junction formed in the substrate and a second source/drain junction formed in the first semiconductor fin. A first gate stack is formed on sidewalls of the first gate channel. A first spacer is interposed between the first gate stack and the first source/drain junction.
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