Array organization and architecture to perform range-match operations with content addressable memory (CAM) circuits
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United States of America Patent
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Mar 1, 2016
Grant Date -
Jul 9, 2015
app pub date -
Jan 6, 2014
filing date -
Jan 6, 2014
priority date (Note) -
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Abstract
An array organization and architecture for a content addressable memory (CAM) system. More specifically, a circuit is provided for that includes a first portion of the CAM configured to perform a first inequality operation implemented between 1 to n CAM entries. The circuit further includes a second portion of the CAM configured to perform a second inequality operation implemented between the 1 to n CAM entries. The first portion and the second portion are triangularly arranged side by side such that the first inequality operation and the second inequality operation are implemented between the 1 to n CAM entries using the same n wordlines.
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