Embedded NVM in a HKMG process

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United States of America Patent

PATENT NO 9276008
APP PUB NO 20150194439A1
SERIAL NO

14661729

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Abstract

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A process integration is disclosed for fabricating complete, planar non-volatile memory (NVM) cells (110) prior to the formation of high-k metal gate electrodes for CMOS transistors (212, 213) using a planarized dielectric layer (26) and protective mask (28) to enable use of a gate-last HKMG CMOS process flow without interfering with the operation or reliability of the NVM cells.

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Patent Owner(s)

  • NXP USA, INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Baker,, Jr Frank K Austin, US 32 376
Cheek, Jon D Cedar Park, US 53 735

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