Framework for balancing robustness and latency during collection of statistics from soft reads

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United States of America Patent

PATENT NO 9645763
SERIAL NO

14181893

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Abstract

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An apparatus includes a plurality of memory devices and a controller. The controller is coupled to the plurality of memory devices and configured to store data in the plurality of memory devices using units of super-blocks. Each super-block comprises a block from each of the plurality of memory devices and the controller balances time efficiency and robustness during collection of statistics from soft reads of each super-block.

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Patent Owner(s)

  • SEAGATE TECHNOLOGY LLC

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Haratsch, Erich F San Jose, US 166 2897
Sankaranarayanan, Sundararajan Fremont, US 51 681

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