Communicating with MIPI-compliant devices using non-MIPI interfaces
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United States of America Patent
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Mar 28, 2017
Issued Date -
N/A
app pub date -
Mar 20, 2014
filing date -
Jan 10, 2014
priority date (Note) -
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Abstract
Using relatively inexpensive, external resistor networks, an electronic device, such as an FPGA, can be configured to use non-MIPI interfaces to communicate with one or more MIPI-compliant devices, such as video sources (e.g., cameras) and sinks (e.g., displays). High-speed (HS) and low-power (LP) MIPI signaling for each MIPI clock/data lane is supported by a set of one or more non-MIPI interfaces, such as LVDS and/or LVCMOS receivers, transmitters, and/or transceivers, and an appropriate, corresponding, external resistor network. For configurations in which the resistor-configured electronic device can handle high-speed MIPI data from a MIPI-compliant device, the electronic device can detect transitions in the MIPI mode of the MIPI-compliant device. In some configurations, the resistor-configured electronic device can provide high-speed MIPI data to a MIPI-compliant device. In either case, the electronic device configures the non-MIPI interfaces to support the current MIPI HS/LP mode.
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