THREE DIMENSIONAL NON-VOLATILE MEMORY WITH CHARGE STORAGE NODE ISOLATION
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United States of America Patent
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Issued Date -
Jul 30, 2015
app pub date -
Dec 1, 2014
filing date -
Dec 5, 2013
priority date (Note) -
Abandoned
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Abstract
A three-dimensional integrated circuit nonvolatile memory array includes a memory array with a plurality of string stacks laterally disposed in parallel over a substrate to intersect with a plurality of parallel conductive gate structures separated from one another by intervening fin-shaped dielectric structures, where each string stack includes conductive strips separated from each other by interlayer insulating strips, and where a charge storage node is positioned between each conductive strip and each intersecting conductive gate structure to be electrically isolated from neighboring charge storage nodes x, y, and z directions.
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