Device, method and system for operation of a low power PHY with a PCIe protocol stack

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United States of America Patent

PATENT NO 9575552
APP PUB NO 20150220140A1
SERIAL NO

14129545

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Abstract

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Translation circuitry for facilitating communication between a protocol stack for a PCIe™ communication protocol and a PHY layer for a low power communication standard. In an embodiment, the translation circuitry includes logic is to variously convert signaling between two or more PHY interface standards. The one or more a PHY interface standards may include a PHY Interface for PCI Express (PIPE) specification and a standard for a comparatively low power communication protocol. In another embodiment, the low power communication standard is a Reference M-PHY Module Interface (RMMI) specification.

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Patent Owner(s)

  • INTEL CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Lim, Su Wei Klang, MY 49 390
Por, Choon Gun Georgetown, MY 8 69

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