Methods of forming ultra thin package structures including low temperature solder and structures formed therby

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United States of America Patent

PATENT NO 9461014
APP PUB NO 20150221609A1
SERIAL NO

14686177

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Abstract

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Methods of forming a microelectronic packaging structure and associated structures formed thereby are described. Those methods and structures may include attaching a device to a patch substrate, wherein the assembled device and patch substrate comprise a warpage, attaching the assembled device and patch substrate to an interposer to form a package structure, and then reflowing the package structure at a temperature below about 200 degrees Celsius to form a substantially flat package structure.

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Patent Owner(s)

  • INTEL CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Sidhu, Rajen S Chandler, US 18 158
Srinivasan, Sriram Chandler, US 141 1749
Start, Paul R Chandler, US 12 117
Swaminathan, Rajasekaran Tempe, US 53 393
Viswanath, Ram S Phoenix, US 29 378

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