Power-on reset circuit
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United States of America Patent
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Jun 14, 2016
Grant Date -
Aug 20, 2015
app pub date -
Jul 21, 2014
filing date -
Feb 19, 2014
priority date (Note) -
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status (Latency Note)
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Abstract
A power-on reset circuit of one embodiment includes first and second power supplies, first and second detecting circuit, a differentiation circuit, a current mirror circuit and a latch circuit. The second power supply is generated from a voltage of the first power supply and supplies a voltage lower than the first power supply. The first detecting circuit detects rise of a voltage of the second power supply. A current corresponding to a change in potential of the first power supply flows through the differentiation circuit. The current mirror circuit multiplies the current flowing through the differentiation circuit. The second detecting circuit senses stoppage of output current of the current mirror circuit and detects completion of the rise of the voltage of the first power supply. The latch circuit is reset by an output signal of the first detecting circuit and set by an output signal of the second detecting circuit.
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