INPUT BUFFER CIRCUIT, METHOD, AND INTEGRATED CIRCUIT
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United States of America Patent
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Issued Date -
Aug 20, 2015
app pub date -
Feb 13, 2015
filing date -
Feb 14, 2014
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
This document discusses, among other things, an input buffer circuit, an input buffer method, and an integrated circuit, the input buffer circuit raising, using a potential raising device, a potential of a first reference ground to a potential of a second reference ground of an input stage, and improving a trigger voltage of the input stage. After the input stage is triggered and outputs a first buffer signal, an output stage transforms the potential of the second reference ground of the first buffer signal back to the potential of the first reference ground, and outputs a second buffer signal.
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