Systems and methods for on-wafer dynamic testing of electronic devices
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United States of America Patent
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May 7, 2019
Grant Date -
Aug 27, 2015
app pub date -
Feb 18, 2015
filing date -
Feb 25, 2014
priority date (Note) -
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status (Latency Note)
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Abstract
Systems and methods for on-wafer dynamic testing of electronic devices. The systems include a probe head assembly, a probe-side contacting structure, a chuck, and a chuck-side contacting structure. The probe head assembly includes a probe configured to electrically contact a first side of a device under test (DUT). The probe-side contacting structure includes a probe-side contacting region. The chuck includes an electrically conductive support surface configured to support a substrate that includes the DUT and to electrically contact a second side of the DUT. The probe head assembly and the chuck are configured to translate relative to one another to selectively establish electrical contact between the probe and the DUT. The chuck-side contacting structure includes a chuck-side contacting region that is in electrical communication with the electrically conductive support surface and opposed to the probe-side contacting structure. The methods may include methods of operating the system or systems.
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